台灣巨頭加入三星和英特爾爭奪最新半導體技術的行列 Taiwanese titan joins Samsung and Intel in race for latest semiconductor tech

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促進全球Top1美國最新次世代超導體IP技術全球聯盟與產業永續發展 【 線上報名】

台北/首爾——台積電表示，它將在 2025 年之前開始生產超先進的 2 奈米芯片，繼三星電子和英特爾發布類似公告後，這將新的注意力放在開發尖端半導體技術的競賽上。

台積電週四在美國舉行的行業活動上宣布了這一消息，這是其兩年來首次面對面的技術研討會。這家台灣芯片巨頭表示，其 2nm 技術將基於“納米片晶體管架構”，以顯著提高性能和功率效率。 Nanosheet 架構與目前市場上最先進的用於 5nm 芯片的 Finfet 基礎架構是完全不同的基礎架構。這種新技術需要大量投資才能提供。

這是台積電首次明確確定其 2nm 芯片生產的時間表。這家芯片巨頭目前正準備在今年下半年推出3nm芯片生產技術。主要生產基地位於台灣南部城市台南。

台積電宣布這一消息之際，其主要行業競爭對手已經制定了類似的路線圖。三星表示，它將在 2025 年之前開始生產 2nm 芯片，而英特爾的目標是在 2024 年底之前製造更先​​進的芯片。據說日本也正在與美國合作製造 2nm 芯片技術，並將在 2025 年之前部署。

英特爾已承諾到 2025 年重新獲得芯片製造技術的領先地位。該公司於 2021 年年中首次披露了其 1.8nm 技術——它稱之為 18A 技術。今年，英特爾首席執行官 Pat Gelsinger 表示，這項技術“比計劃提前了六個月”，並將時間表提前到了 2024 年底。

三星在 4 月份表示，將在今年 6 月底之前生產 3nm 芯片。

數字越小，芯片越先進，但將更多晶體管擠在微型芯片上也更具挑戰性。大規模生產尖端芯片的時間框架和能力表明了芯片製造商的技術實力。

目前，只有台積電、英特爾和三星有能力追求這種尖端的芯片生產技術。中國的芯片製造冠軍半導體製造國際有限公司有這樣做的雄心，但它被華盛頓列入黑名單，華盛頓已阻止其獲得關鍵芯片生產設備——開發先進芯片製造技術的重要工具。

TAIPEI/SEOUL -- Taiwan Semiconductor Manufacturing Co. says it will begin production of ultra-advanced 2 nanometer chips by 2025, putting fresh attention on the race to develop cutting-edge semiconductor technologies following similar announcements by Samsung Electronics and Intel.

TSMC made its announcement at an industry event on Thursday in the U.S., its first in-person tech symposium in two years. The Taiwanese chip titan said its 2nm tech will be based on "nanosheet transistor architecture" to deliver significant improvements in performance and power efficiency. Nanosheet architecture is a completely different infrastructure from the Finfet infrastructure used for 5nm chips, currently the most advanced on the market. Such new tech requires massive investments to make available.

This is the first time TSMC has specifically pinned down a schedule for its 2nm chip production. The chipmaking titan currently is gearing up to introduce the 3nm chip production technology in the second half of this year. The key production site is in the southern Taiwan city of Tainan.

TSMC's announcement comes as its major industry competitors have laid out similar roadmaps. Samsung says it will begin producing 2nm chips by 2025, while Intel is aiming to manufacture even more advanced chips by late 2024. Japan is also said to be working with the U.S. on 2nm chip technology manufacturing, to be deployed by 2025.

Intel has pledged to regain chip manufacturing tech leadership by 2025. The company first disclosed its 1.8nm technology -- what it calls 18A technology -- in mid-2021. This year, Intel CEO Pat Gelsinger said this tech is "six months ahead of schedule" and pushed ahead the timetable to the end of 2024.

Samsung said in April that it will produce 3nm chips by the end of June this year.

The smaller the number, the more advanced the chip, but it is also more challenging to squeeze more transistors onto the tiny chips. The timeframe and capability of mass producing the cutting-edge chips is an indication of the technological prowess of chipmakers.

Currently, only TSMC, Intel and Samsung are capable of pursuing such cutting-edge chip production technologies. China's chipmaking champion Semiconductor Manufacturing International Co. has the ambition to do so, but it is blacklisted by Washington, which has blocked its access to critical chip production equipment -- essential tools for developing advanced chip manufacturing technologies.

台積電 FINFLEX™、N2 工藝創新亮相 2022 年北美技術研討會

加利福尼亞州聖克拉拉市，2022 年 6 月 16 日——台積電（台灣證券交易所股票代碼：2330，紐約證券交易所股票代碼：TSM）今天在公司 2022 年北美技術研討會上展示了其先進邏輯、專業和 3D IC 技術的最新創新，下一個 -由納米片晶體管驅動的新一代領先 N2 工藝和用於 N3 和 N3E 工藝的獨特 FINFLEX™ 技術首次亮相。

繼過去兩年在網上舉辦的北美研討會後，在加利福尼亞州聖克拉拉舉行的北美研討會將在未來幾個月內在全球範圍內啟動一系列技術研討會。研討會還設有一個創新區，重點介紹台積電新興初創客戶的成就。

“我們生活在一個瞬息萬變的數字世界中，對計算能力和能源效率的需求比以往任何時候都增長得更快，為半導體行業創造了前所未有的機遇和挑戰，”C.C. 博士說。台積電總裁魏偉。 “我們將在我們的技術研討會上展示的創新展示了台積電的技術領先地位以及我們在這個激動人心的轉型和增長時期支持我們的客戶的承諾。”

研討會上強調的主要技術包括：

用於 N3 和 N3E 的 TSMC FINFLEX™ - 台積電行業領先的 N3 技術將於 2022 年晚些時候進入量產階段，它將採用革命性的 TSMC FINFLEX™ 架構創新，為設計人員提供無與倫比的靈活性。 TSMC FINFLEX™ 創新提供了不同標准單元的選擇，其中 3-2 鰭配置可實現超性能，2-1 鰭配置可實現最佳功率效率和晶體管密度，2-2 鰭配置可在兩者之間實現平衡高效的性能。借助 TSMC FINFLEX™ 架構，客戶可以創建片上系統設計，其功能塊可針對所需性能、功率和麵積目標實施最佳優化的鰭配置，並集成在同一芯片上，從而針對他們的需求進行精確調整。如需了解更多有關 FINFLEX 的信息，請訪問 N3.TSMC.COM。

N2 技術 - 台積電的 N2 技術代表了 N3 的又一個顯著進步，在相同功率下速度提升 10-15%，或在相同速度下功率降低 25-30%，開啟高效性能新時代。 N2 將採用納米片晶體管架構，在性能和功率效率方面提供全節點改進，以支持台積電客戶的下一代產品創新。除了移動計算基準版本之外，N2 技術平台還包括一個高性能變體，以及全面的小芯片集成解決方案。 N2計劃於2025年開始生產。

擴展超低功耗平台——在 2020 年技術研討會上宣布的 N12e 技術的成功基礎上，台積電正在開發 N6e，這是工藝技術的下一個演變，旨在提供邊緣人工智能和物聯網設備所需的計算能力和能源效率。 N6e 將基於台積電先進的 7nm 工藝，預計邏輯密度是 N12e 的三倍。它將作為台積電超低功耗平台的一部分，該平台是針對邊緣人工智能和物聯網應用的綜合邏輯、射頻、模擬、嵌入式非易失性存儲器和電源管理 IC 解決方案組合。

TSMC 3DFabric™ 3D 矽堆疊解決方案 - 台積電展示了 TSMC-SoIC™ 芯片堆疊解決方案的兩個突破性客戶應用：

世界上第一個基於 SoIC 的 CPU，採用晶片上芯片 (CoW) 技術將 SRAM 堆疊為 3 級緩存
使用 Wafer-on-Wafer (WoW) 技術堆疊在深溝槽電容器芯片頂部的突破性智能處理單元。
由於 CoW 和 WoW 的 N7 芯片已經投入生產，對 N5 技術的支持計劃於 2023 年推出。為滿足客戶對 SoIC 和其他台積電 3DFabric™ 系統集成服務的需求，全球首家全自動 3DFabric 工廠將在2022年下半年。

促進全球Top1美國最新次世代超導體IP技術全球聯盟與產業永續發展 【 線上報名】

SANTA CLARA, CA, Jun. 16, 2022 – TSMC (TWSE: 2330, NYSE: TSM) today showcased the newest innovations in its advanced logic, specialty, and 3D IC technologies at the Company’s 2022 North America Technology Symposium, with the next-generation leading-edge N2 process powered by nanosheet transistors and the unique FINFLEX™ technology for the N3 and N3E processes making their debut.

Resuming as an in-person event after being held online in the past two years, the North America symposium in Santa Clara, California, kicks off a series of Technology Symposiums around the world in the coming months. The Symposiums also feature an Innovation Zone that spotlights the achievements of TSMC’s emerging start-up customers. 

“We are living in a rapidly changing, supercharged, digital world where demand for computational power and energy efficiency is growing faster than ever before, creating unprecedented opportunities and challenges for the semiconductor industry,” said Dr. C.C. Wei, CEO of TSMC. “The innovations we will showcase at our Technology Symposiums demonstrate TSMC’s technology leadership and our commitment to support our customers through this exciting period of transformation and growth.”

Major technologies highlighted at the Symposium include:

TSMC FINFLEX™ for N3 and N3E - TSMC’s industry-leading N3 technology, set to enter volume production later in 2022, will feature the revolutionary TSMC FINFLEX™ architectural innovation offering unparalleled flexibility for designers. The TSMC FINFLEX™ innovation offers choices of different standard cells with a 3-2 fin configuration for ultra performance, a 2-1 fin configuration for best power efficiency and transistor density, and a 2-2 fin configuration providing a balance between the two for Efficient Performance. With TSMC FINFLEX™ architecture, customers can create system-on-chip designs precisely tuned for their needs with functional blocks implementing the best optimized fin configuration for the desired performance, power and area target, and integrated on the same chip. For more information on FINFLEX, please visit N3.TSMC.COM.

N2 Technology - TSMC’s N2 technology represents another remarkable advancement over N3, with 10-15% speed improvement at the same power, or 25-30% power reduction at the same speed, ushering in a new era of Efficient Performance. N2 will feature nanosheet transistor architecture to deliver a full-node improvement in performance and power efficiency to enable next-generation product innovations from TSMC customers. The N2 technology platform includes a high-performance variant in addition to the mobile compute baseline version, as well as comprehensive chiplet integration solutions. N2 is scheduled to begin production in 2025.

Expanding Ultra -Low Power Platform - Building on the success of the N12e technology announced at the 2020 Technology Symposium, TSMC is developing N6e, the next evolution in process technology tuned to provide the computing power and energy efficiency required by edge AI and IoT devices. N6e will be based on TSMC’s advanced 7nm process and is expected to have three times greater logic density than N12e. It will serve as a part of TSMC’s Ultra-Low Power platform, a comprehensive portfolio of logic, RF, analog, embedded nonvolatile memory, and power management IC solutions aimed at applications in edge AI and the Internet of Things.

TSMC 3DFabric™ 3D Silicon Stacking Solutions - TSMC is showcasing two groundbreaking customer applications of the TSMC-SoIC™ chip stacking solution:

The world’s first SoIC-based CPU employing Chip-on-Wafer (CoW) technology to stack SRAM as a Level 3 cache
A groundbreaking intelligence processing unit stacked on top of a deep trench capacitor die using Wafer-on-Wafer (WoW) technology.
With N7 chips already in production for both CoW and WoW, support for N5 technology is scheduled for 2023. To meet customer demand for SoIC and other TSMC 3DFabric™ system integration services, the world’s first fully automated 3DFabric factory is set to begin production in the second half of 2022.

IAE引領全球次世代半導體超導體 IP專利技術，未來20年半導體（碳化矽材料） IP專利技術主流趨勢！台積電2025年量產2奈米北美技術論壇大秀創新！

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